It appears that IGOR’s Lab and Yuri “1usmus” Bubliy have just made an interesting discovery in the course of working on the new Clock Tuner for Ryzen (CTR) 2.0 for the Zen3 CPUs. According to their investigation some AMD Ryzen 5 5600X and Ryzen 7 5800X processors are physically based on a dual-CCD design, instead of a single-CCD design.
Two CPU models have been spotted with two CCDs physically present as well. Based on their core count design, these SKUs are meant to be single-CCD processors, but a second CCD has been spotted on board.
In case you didn’t know, AMD’s new Zen3-based Vermeer Ryzen CPUs are based on the multi-chip module/MCM design. These appear to be binned products. In this case, the second CCD die might be having an issue and is therefore disabled, or it might be in a deep sleep mode/state.
These Zen 3 desktop processors use up to two 8-core CCDs to achieve their core-counts of up to 16 cores. Which means that the 12-core 5900X and 16-core 5950X use two CCDs, whereas the 6-core 5600X and 8-core 5800X normally have just one CCD.
Though, that isn’t the case anymore, as investigated by Yuri and Igor. This can easily be read out with suitable software like e.g. Clock Tuner as shown below. It says, “Active CCD#2”.
According to this new testing done it appears that select 5600X and 5800X SKUs have been built from dual-CCD MCMs, but even though the entire CCD is physically present on the chip package, it is disabled. But should this change affect you as a customer/buyer of these products? Will the performance be compromised? No, not at all.
The CPU will perform as advertised, with AMD also giving full warranties for these products as well. You might not even come to know, what hardware changes have been done under the Processor/chip’s hood.
So assuming the 5600X is based on a dual-CCD design then it is essentially a 5900X SKU, in which one of the CCDs didn’t fully qualify in the testing process. Similarly, the 5800X dual-CCD is basically a 5950X SKU in which one such CCD die didn’t pass and qualify the final testing. These might be unqualified samples.
Either CCD 0 or CCD 1 could be disabled in these chips, depending on the Model. Though, the only main concern here is some Minor UI bugs which you may encounter sometimes when CCD 0 is fully disabled.
For example, Yuri could see that CCD #1, while not available for normal operations, was not actually shut down. Besides the active power supply, the CCD was in the so-called Deep Sleep Mode, which of course is a de-facto shutdown.
Now that these Zen 3 CPUs are dual-CCD 5600X and 5800X chips, there is a possibility of unlocking them to the Ryzen 9 SKU as well.
As Igor outlined, “We suspect that this is a Ryzen 9 that was sorted out after the fact, with the Ryzen 5 5600X pictured here suggesting a faulty Ryzen 9 5900X that may not have passed quality testing. That’s not a bad thing per se, because the demand for all current Ryzen CPUs is extremely high and you can also use supposed rejects.
However, it is suspected that the overclocking margins might be a bit smaller. However, the presence of a second, deactivated CCD will not affect normal operation, that is also certain.”
It might certainly be possible to find a way to use both CCDs and cancel the disabled area. However, this raises the question of the effort and, above all, the reasons for the deactivation in the first place.
Because AMD will hardly sell the Ryzen 9 as a Ryzen 5 or Ryzen 7 CPU without a good reason and if one of the CCDs didn’t fully qualify in the testing process, then this speaks for itself. But we should also remember AMD’s older gen three-core Athlon II X3 and Phenom II X3 CPUs, where the disabled fourth core could often be unlocked via BIOS without any problem.
To recap some of the important points, the Ryzen 5000 CPU lineup based on the new Zen 3 core architecture is fabbed on TSMC’s 7nm process node. The Zen 3 core architecture delivers 19% uplift in terms of IPC over Zen 2, and higher performance per watt increases of up to 24% over Zen 2.
They are designed for use in high-performance desktop platforms and feature up to two CCD’s (Core/Cache Complex Dies) and a single IOD (I/O Die).
Unlike the previous generation design where each CCD comprised of two CCX’s (Core Complexes), the Zen 3 CCD will consist of a single CCX which will feature 8 cores that can run in either a single-thread mode (1T) or a two-thread mode (2T) for up to 16 threads per CCX.
Since the chip houses a maximum of two CCDs, the core and thread count will max out at 16 cores and 32 threads which is the same as the existing flagship AM4 desktop CPU, the Ryzen 9 3950X.
Stay tuned for more tech news!