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AMD’s upcoming Ryzen 5000 ‘Cezanne’ APUs will feature 8 ZEN 3 cores per core complex/CCX

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AMD plans to release next-gen APUs by next year. The Ryzen 5000 Cezanne APU lineup will be a direct successor to Renoir. These are rumored to be based on the ZEN 3 architecture. These might target the high-end notebook (FP6), and mid-range desktop APU segment (AM4 socket).

The Cezanne family will be based on two segments, the high-performance Cezanne-H and the low-power Cezanne-U series. These processors will be based on the FP6/AM4 package, the BGA platform. The GPU powering the Cezanne APU is going to be an enhanced version of the existing Vega/GCN architecture silicon. The Cezanne APUs should be fabbed on the TSMC’s N7 process node, but we are not fully sure. These APUs are expected to hit the market by mid 2021.

Now, according to one leak posted by Twitter user Patrick Schur, @patrickschur_one engineering sample of AMD’s Cezanne APU has been spotted.  It has been reported that Cezanne will feature eight cores. All of these 8 cores would be available within a singular CCX, thus unifying all of Cezanne’s CPU cores into a single core complex.

The sample listed is an 8 core Cezanne APU. The chip features an OPN code of ‘100-000000285-30_Y‘. The chip was spotted with ‘A0 stepping’ and it seems to be an early engineering sample variant having a base clock of 3.0 GHz. These reports regarding Cezanne sit well within expectations for Zen 3 as rumored before, having a unified L3 cache and eight cores within a single CCX (CPU Core Complex).

AMD Ryzen 4000 Renoir APUs which are based on the Zen 2 core architecture all come in a single monolithic die design. The die has two core complexes, each of which features four cores, along with 4 MB of L3 cache. With Zen 3, AMD plans to take a different approach and each Zen 3 CCX will feature 8 cores and a unified L3 cache. Processor communications with cores and caches outside of each core’s CCX will lead to a latency penalty. Having more cores within a CCX allows more cores to communicate without inter-CCX latency penalties. Zen 3 should offer faster core-to-core communication, thus enabling increased performance across a variety of workloads. Each CPU core will also have access to a larger pool of L3 cache without inter-CCX latencies.

Cezanne and ‘Vermeer’ desktop family of processors will feature a new Zen 3 CPU architecture, bringing big changes to AMD’s core designs as well.  This may definitively help with higher single-threaded and multi-threaded IPC boosts. When combined this with higher clock speeds we can expect significant performance gains. Like mentioned before, Zen 3 processors are going to feature a combined and a unified L3 cache for each Zen 3 chiplet. This will make L3 cache access times more feasible across the entire Zen 3 chiplet. Larger cache sizes could mean longer cache latencies, and this is true for Zen 3 CPUs. The CPU cores can now share the information more easily. These latencies are only slightly increased though, and will be mitigated by more even cache access times, allowing information to be easily shared between the CPU cores.

Larger cache sizes could help with boosting Zen 3’s multi-threaded, as well as Gaming performance. The previous gen Zen 2 CPUs already featured double the L3 cache over the Zen/Zen+ series chips, and ZEN 3 is going to take things to a whole new level. AMD’s next-generation Zen 3 architecture aims to alleviate some of the shortcomings of AMD’s existing architecture designs. When the Ryzen 3000 series were launched, AMD aggressively marketed Zen 2’s cache design changes, such as the gamecache feature, to highlight the performance jump in Gaming benchmarks.  With Zen 3’s new cache changes each CPU core will have even faster access to a larger pool of the L3 cache.

AMD’s Ryzen 5000 ‘Cezanne’ mobility APU was spotted recently, featuring faster Vega GPU & Zen 3 CPU Cores. Expect more leaks in the coming months. Back in May, @MebiuW revealed a new codename for AMD Ryzen processor series, Warhol. Now he has posted another part of the same roadmap. It appears AMD is set to launch Warhol, Van Gogh and Cezanne in 2021. Van Gogh is labeled with CVML which means ‘Computer Vision and Machine Learning’, so these will target a different market segment. Van Gogh would be the first APU to feature Navi.

First Navi2-based APUs are also coming next year. Raphael Ryzen 6000 series on the other hand might feature a new ZEN 4 architecture fabbed on the 5nm process node. AMD Van Gogh is likely an Ultra-low power Ryzen APU to feature Zen 2 CPU & RDNA 2 GPU Architecture within 7.5W-18W TDP configurations, as evident from this new tweet.

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