The latest Ashes of the Singularity database shows an unreleased AMD Ryzen 7 5700U processor, as spotted by @TUM_APISAK. This is most probably the first APU/CPU in the Ryzen 5000-series family based on the ZEN 3 architecture.
Though, it is not fully confirmed if this processor is part of the series codenamed as ‘Cezanne’,’ Van Gogh’, or ‘Lucienne’. But there are more chances that the Ryzen 7 5700U is a Lucienne-U APU. Lucienne series is rumored to be a refresh of the ‘Renoir’ lineup, and these will land up in Google Chromebooks.
OMG 5700U is Lucienne?Renoir refresh? pic.twitter.com/bTLyLHDFbA
— MebiuW (@MebiuW) September 23, 2020
But if this processor belongs to the Cezanne family, then this would be the first Zen3 mobile processor. According to @MebiuW the Ryzen 5000 series APUs will come in two flavors, Cezanne chip design and the other under Lucienne. The AMD Ryzen 5000 series under the Lucienne family will be branded as AMD Ryzen 5 5500U and Ryzen 7 5700U, while the Cezanne family will feature the Ryzen 5 5600U and Ryzen 7 5800U APUs, respectively, as shown below.
— MebiuW (@MebiuW) September 23, 2020
The Ryzen 5000 Cezanne APU lineup will be a direct successor to Renoir. These might target the high-end notebook (FP6), and mid-range desktop APU segment (AM4 socket), and will offer higher clock speeds for both compute and graphics.
The Cezanne family will be based on two segments, the high-performance Cezanne-H and the low-power Cezanne-U series. These processors will be based on the FP6/AM4 package, the BGA platform. The GPU powering the Cezanne APU is going to be an enhanced version of the existing Vega/GCN architecture silicon. The Cezanne APUs should be fabbed on the TSMC’s N7 process node, but we are not fully sure. These APUs are expected to hit the market by mid or late 2021 (just a speculation).
— APISAK (@TUM_APISAK) September 23, 2020
Cezanne APUs will offer a brand new Zen core architecture along with faster Vega graphics and a recent leaked entry over at Sisoftware’s database seems to validate this information. The result and the score in the above leaked AOTS benchmark appears to be very low. This could be because the Ryzen U-series usually have 15W TDP, or no proper test driver was used. The Ryzen 7 5700U is reportedly an 8-core and 16-thread APU. The clock speeds are not reported by the software.
One leaked roadmap showing AMD’s CPU lineup, courtesy of @MebiuW.
AMD’s upcoming Ryzen 5000 ‘Cezanne’ APUs will also feature 8 ZEN 3 cores per core complex/CCX as reported before. Cezanne will feature eight cores. All of these 8 cores would be available within a singular CCX, thus unifying all of Cezanne’s CPU cores into a single core complex. These reports regarding Cezanne sit well within expectations for Zen 3 as rumored before, having a unified L3 cache and eight cores within a single CCX (CPU Core Complex).
AMD Ryzen 4000 Renoir APUs based on the Zen 2 core architecture all come in a single monolithic die design. The die has two core complexes, each of which features four cores, along with 4 MB of L3 cache. With Zen 3, AMD plans to take a different approach and each Zen 3 CCX will feature 8 cores and a unified L3 cache. Processor communications with cores and caches outside of each core’s CCX will lead to a latency penalty.
Having more cores within a CCX allows more cores to communicate without inter-CCX latency penalties. Zen 3 should offer faster core-to-core communication, thus enabling increased performance across a variety of workloads. Each CPU core will also have access to a larger pool of L3 cache without inter-CCX latencies. Cezanne and ‘Vermeer’ desktop family of processors will feature a new Zen 3 CPU architecture, bringing big changes to AMD’s core designs as well. This may definitively help with higher single-threaded and multi-threaded IPC boosts. When combined this with higher clock speeds we can expect significant performance gains.
Like mentioned before, Zen 3 processors are going to feature a combined and a unified L3 cache for each Zen 3 chiplet. This will make L3 cache access times more feasible across the entire Zen 3 chiplet. Larger cache sizes could mean longer cache latencies, and this is true for Zen 3 CPUs. The CPU cores can now share the information more easily. These latencies are only slightly increased though, and will be mitigated by more even cache access times, allowing information to be easily shared between the CPU cores.
Larger cache sizes could help with boosting Zen 3’s multi-threaded, as well as Gaming performance. The previous gen Zen 2 CPUs already featured double the L3 cache over the Zen/Zen+ series chips, and ZEN 3 is going to take things to a whole new level. AMD’s next-generation Zen 3 architecture aims to alleviate some of the shortcomings of AMD’s existing architecture designs.
When the Ryzen 3000 series were launched, AMD aggressively marketed Zen 2’s cache design changes, such as the gamecache feature, to highlight the performance jump in Gaming benchmarks. With Zen 3’s new cache changes each CPU core will have even faster access to a larger pool of the L3 cache.
On some other news/leak related to AMD’s processor lineup, the next-gen ‘Rembrandt’ Ryzen APU will feature an enhanced Zen 3 CPU architecture, & RDNA 2 GPU cores on a 6nm Process Node, and these will also offer support for DDR5-5200 memory. @patrickschur_ has provided a new update to his previous leak on Twitter.
Update: Rembrandt with DDR5-5200 support, 20x PCIe 4.0 lanes and two USB4 (40 Gbps) ports.
— Patrick Schur (@patrickschur_) September 22, 2020
AMD Rembrandt is the codename for the next-generation APU for both desktop and mobile platforms. This APU lineup is a successor to Cezanne. Rembrandt would launch as 6000G and 6000H series, since we expect the CPU architecture to feature a 45-65W TDP envelope. According to the latest tweet posted by @Patrickschur_, the Rembrandt APUs will feature up to DDR5-5200 memory support, 20 PCIe Gen 4 lanes, and two USB 4 (40 Gbps) ports.
These might be the first APU family to support the AM5 socket. These will probably launch around 2022 timeframe, so the AM5 platform should be out by that time. The transition to a new socket will provide support for next-generation DDR5 memory as well.
AMD will officially announce the Zen 3 CPU architecture on October 8, and the event will first include the ‘Vermeer’ lineup of Desktop processors. The Cezanne APU family is also based on the Zen 3 arch. Both Cezanne and Vermeer are going to have the 5000-series nomenclature to avoid any confusion.
Stay tuned for more!