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Intel’s latest gen Celeron/Pentium CPUs now offer support for AVX2 and AVX-512 instruction sets

It appears that Intel’s entry-level processors now offer almost the same feature set as the high-end Core series. The new Tiger Lake-based Celeron and Pentium Gold Laptop processors feature support for the AVX2 as well as AVX512-VNNI instruction sets.

The cheaper Celeron and Pentium Gold parts usually had a number of feature sets disabled by INTEL to differentiate them from the expensive high-end core series of CPUs, from the same core architecture and generation.  Disabling such features used to slow down some of the applications in use, impacting overall performance.

Now, it looks like Intel plans to take a different approach with the new Tiger Lake-based Celeron 6305/6305E and Pentium Gold 7505 Mobile processors.

However, this doesn’t come as a surprise since Intel’s upcoming low-power desktop Alder Lake-S Gracemont cores will also support AVX/AVX2, AVX-VNNI instruction sets.

Unlike previous gen Notebook processors, the new Celeron 6305 and Pentium Gold 7505 CPUs support the AVX2 instruction set, Intel Deep Learning Boost technology (via the AVX512-VNNI instruction), as well as the Intel Gaussian and Neural Accelerator 2.0 feature (GNA).

These features are already supported by the high-end Tiger Lake processors from the same generation. The blue team has been recently adding AVX-512 instruction set support in its latest gen CPUs. These chips are now able to accelerate more complex calculations, perform tasks related to Artificial Intelligence more efficiently.

Intel GNA is designed to process AI speech and audio applications such as neural noise cancellation while simultaneously freeing up CPU resources for overall system performance and responsiveness.

Interestingly, these new 11th gen Celeron and Pentium parts also feature Xe-LP integrated graphics with 48 EUs. You also get Thunderbolt 4 support and one Pentium Gold SKU even has a Turbo Boost 2.0 feature. We expect these same features to come to the Desktop counterparts as well.

As evident from the Intel ARK database, the new Celeron 6305 and Pentium Gold 7505 CPUs are dual-core having configurable TDP-up frequency of 1.80 GHz and 2.0 GHz (respectively), 4 MB cache, and UHD Graphics based on the Xe-LP architecture with 48 execution units/EUs. Along with a dual-channel memory controller that offers support for DDR4-3200 as well as LPDDR4X-3733 system memory.

Both these processors are also based on the 10 nm SuperFin Lithography. Since these new Celeron and Pentium chips feature Intel’s Xe-LP GPU with 48 EUs, this makes them slightly more efficient and powerful than the Intel’s Core i7 chips with Iris Pro graphics.

For what it’s worth, the Pentium Gold 7505 also supports Turbo Boost 2.0 feature of up to 3.50 GHz.

Despite being entry-level processors, these chips have specifications that should be sufficient for basic everyday tasks, and small applications, especially if we consider the performance boost offered by the new Willow Cove cores, and the 10 nm SuperFin process node.

To reiterate once again, the Intel Celeron 6305 has 2 cores and 2 threads running at 1.8 GHz, accompanied by 4MB of cache. The Intel Pentium Gold 7505 on the other hand offers 2 cores and 4 threads with a base clock of 2 GHz and boost clock of 3.5 GHz, and also sports 4MB of cache. Both these parts operate within a configurable 15W TDP envelope.

The Configurable TDP-up Frequency is a processor operating mode where the processor behavior and performance is modified by raising TDP and the processor frequency to fixed points. The Configurable TDP-up Frequency is where the Configurable TDP-up is defined.

Configurable TDP-up on the other hand is a processor operating mode where the processor behavior and performance is modified by raising TDP and the processor frequency to fixed points. The use of Configurable TDP-up is typically executed by the system manufacturer to optimize power and performance.

Configurable TDP-up is the average power, in watts, that the processor dissipates when operating at the Configurable TDP-up frequency under an Intel-defined, high-complexity workload.

It should also be noted that these are entry-level products aimed practically at OEM partners who will be able to integrate them on notebooks, AiO PCs and mini-PCs etc.

Speaking of Alder Lake- S Gracemont cores, these small low-power cores have mostly been constrained by size limitation, and power consumption figures and they didn’t have support for the instructions required for various high-performance computing tasks. And also for media encoding/decoding workloads, including other similar heavy tasks.

But this is now going to change with the Alder Lake-S desktop CUP lineup, with the upcoming Gracemont cores having support for AVX, AVX2, and AVX-VNNI instruction sets, respectively

According to Intel’s document, all cores used in Alder Lake architecture will support AVX, AVX-VNNI, AVX2, and UMONITOR/UMWAIT/TPAUSE instructions; however, they won’t have support for the Intel AVX-512 instruction set.

Having AVX-512 might have helped here since the lack of support means that the CPU will not be able to offload workloads from its Golden Cove cores to Gracemont cores. In case you didn’t know, UMONITOR, UMWAIT, and TPAUSE are a set of user wait instructions.

A table showing the full list of supported instruction sets:

Thanks,, and Tom’s Hardware.

Stay tuned for more!